Concurrency

Memory barrier

Instruction that prevents reordering of memory operations across it.


In plain terms

CPUs and compilers reorder for performance. Concurrent code uses barriers to ensure visibility ordering. acquire / release / sequentially-consistent.

Origin

Hardware memory ordering issues became practical concerns when SMP machines arrived in the 1990s. C++11 (2011) standardised the acquire/release/seq-cst vocabulary; Java did the same in JSR-133 (2004).

Where it shows up in production
  • Linux kernel barriers rmb(), wmb(), mb() inserted around shared state. The "Linux Kernel Memory Barriers" doc is the reference.
  • Java volatile Writes become release-stores; reads become acquire-loads. Fixes the double-checked-locking bug.
  • Rust std::sync::atomic::Ordering Five orderings — Relaxed, Acquire, Release, AcqRel, SeqCst.
Sources & further reading
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